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Shorter assembly cycle time
- All the bonding for flip chip packages is completed in one process. |
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Higher signal density & smaller die size
- Area array pad layout increases I/O density. Also, based on the same number of
I/Os, the size of the die can be significantly shrunk. |
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Good electrical performance
- Shorter path between die and substrate improves the electrical performance. |
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Direct thermal dissipation path
- External heat sink can be directly added to the chip to remove the heat. |
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Lower packaging profile
- Absence of wire and molding allows flip chip packages to feature lower profiles. |